Switching apparatus



i 1968 J. B. HEAVISIDE ,3

' SWITCHING APPARATUS Filed Feb. 25, 1965 5 Sheets-Sheet 1 +5, FlGx'l INVENTOR.

JOHN B. HEAVISIDE MORGAN, FINNEGAN, DURHAM a PINE ATTORNEYS Jan. 30, 1968 J V DE 3,366,804

. SWITCHING APPARATUS Filed Feb. 25, 1965 3 Sheets-sheet (5 R CO5 49 5 52/06! ADJUST INVENTOR B54000! JOHN B.HEAV|SIDE MORGAN, FINNEGAN, DURHAM 8 PINE ATTORNEYS 3,366,804 SWITCHING APPARATUS John B. Heaviside, Mineola, N.Y., assignor to North Atlantic Industries, Inc., Piainview, N.Y., a corporation of New Jersey Filed Feb. 25, 1965, Ser. No. 435,149 9 Claims. (Cl. 307-257) ABSTRACT OF THE DISCLOSURE Solid state switching arrangements and applications thereof to digital-analog interface systems are disclosed herein. The described arrangements illustrate switching circuits in diode bridge configurations with the bridge terminals, source-to-be-switched, load and control circuit interconnected to minimize leakage, loading and control signal magnitudes, to maximize precision, and to facilitate multiple switch operation.

This invention relates to switching techniques and more particularly to solid state switching methods and arrangements.

Although solid state switching offers certain advantages over electro-mechanical arrangements, there are many applications where the solid state switch, although otherwise acceptable in terms of complexity, cost, and size, does not possess the requisite performance specifications to meet accuracy requirements.

For example, the dynamic impedance of a solid state diode employed as a switching element may be several ohms and may be as high as several hundred ohms. These impedances may be wholly unacceptable in many applications.

Although there are means for reducing this dynamic impedance, these means frequently result in an increase in cost and complexity to the point where it is more feasible to employ electro-mechanical switching arrangements.

It is accordingly one object of the invention to provide an improved solid state switching arrangement characterized by an improvement in accuracy which is attained without a corresponding increase in size or complexity. It is a further object of the invention to provide improved control arrangements employing such solid state switches in combination with other elements for effecting improvements in various data processing functions including logic operations and basic computations.

Other objects and advantages of the invention will be set forth in part hereinafter and in part will be obvious herefrom or may be learned by practice with the invention, the same being realized and attained by means of the instrumentalities, combinations and improvements herein shown, described and claimed. L

Serving to illustrate exemplary embodiments of the invention are the drawings of which:

FIGURE 1 is a schematic diagram of a switching arrangement according to the invention;

FIGURE 2 is a schematic wirin g diagram of a prior art diode bridge switching circuit;

FIGURE 3 is a schematic wiring diagram of an inductive divider controlled with the aid of switching devices such as those illustrated in FIGURE 1 FIGURE 4 is a schematic diagram illustrating the switching arrangement of FIGURE 1 in a combination providing an inversion operation;

FIGURE 5 is a schematic diagram illustrating the switching technique of FIGURE 1 in a circuit for converting digital inputs to analogue outputs; and

FIGURE 6 is a schematic diagram of a resolver bridge employing switching techniques according to the invention.

For the purpose of contrast, initial reference is to the States atent 3,366,864 Patented Jan. 30, 1968 circuit of FIGURE 2 wherein there is illustrated a solid state diode bridge circuit employed for switching in accordance with prior art techniques.

The diode bridge is constituted with one branch of serially interconnected diodes D and D and another, shunt branch, formed of serially connected diodes D and D The cathode side of the bridge is connected via a resistor R to switching voltage E similarly, the anode side of the bridge is connected via a resistance R to the switching voltage E The controlled or switched circuit includes a source of potential e having one side connected to the common terminal, illustratively ground, and its other terminal connected to the junction of D and D The controlled circuit further includes an output or load circuit U which may be a utilization device, e.g., some circuit in a signal transmission path. Circuit U has one end connected to the junction of diodes D and D and its other terminal returned to the common or ground terminal.

In operation, voltages E E of the proper amplitude and opposite polarity are applied to the switching terminals causing the diodes D D D and D to become forwardly biased. As a result conduction is established between the source e and the output circuit U thereby effecting the switching action.

A practical circuit of the type shown in FIGURE 2 has a number of significant limitations. For one, the resistances R and R act as a load on the source e. The dynamic impedance of the diodes varies inversely with the diode current and since the diodes are effectively in series with the source and output circuit, it becomes necessary to keep the diode dynamic impedance at a sufficiently low value. To do this it is necessary to maintain a relatively high current through the diodes thereby necessitating a minimization of the size of R and R This, however, as noted above, complicates the loading problem. Hence, the circuit requires a compromise of diverging criteria with an attendant limitation on performance.

Certain of the disadvantages of FIGURE 2 have been overcome by circuits according to the invention such as illustrated in FIGURE 1. The main switching arrangement therein illustrated includes a diode bridge having one branch comprising serially interconnected diodes D and D The junction of these two diodes is connected to the common ground terminal. A parallel branch comprises serially interconnected diodes B and D The junction of D and D is connected to the circuit to be controlled, U as well as to the switched voltage source 2 connected in series with U In practice and in certain applications it may be preferable to interchange the relative positions of source 2 and switched circuit U In either configuration, the switching bridge of FIGURE 2 provides the common or reference terminal on one side of the bridge (schematically indicated with the ground terminal) and the circuit to be switched along with the source, on the other side of the bridge. Hence, when the bridge is switched on, the ground connection is supplied to the controlled circuit causing current flow therein. The ground connection may be by way of an impedance small enough to preclude deterioration in accuracy or interference with the control circuit. In view of this arrange ment, the loading effect on the source provided by the resistors in the switch control circuit is eliminated. Furthermore, the forward switching voltage can be low in the circuit of FIGURE 1 whereas in the prior art arrangement it must exceed the peak value of the signal source, e.

The anode side of the switching bridge in FIGURE 1 is connected to a first switching voltage -E via a resistance R The anode side is also connected to a second switching voltage +E via the series combination of resistance R and the collector-emitter circuit of a transistor driver Q On the cathode side of the diode bridge there is an analogous connection to a switching voltage +E via a resistance R and to a second switching voltage -E via the series combination of resistance R and the collector-emitter circuit of a driver stage Q The switching voltages +E and E are operative to back-bias the diode bridge to a sufficient degree to prevent conduction except under the conditions described hereinafter. In contrast with the arrangement of FIGURE 2, the bridge is supplied with separate switching voltages +E and E which are operative when applied to the bridge to cause conduction with a resultant switching of the output circuit. The voltages 1E may be relatively small compared with the amplitude of E and in an illustrative application E may be in the order of three volts while B, is thirty volts.

The base of Q is connected via a resistance R and a diode D to an input terminal 1 Similarly, the base of Q is conected via the series combination of R and D to terminal 1 With the circuit thus far described, the application of a potential at 1 which is sufficient to forwardly bias Q will cause the saturation of Q and the resultant connection of the on voltage, E to the diode bridge via resistance R A similar voltage of opposite polarity applied to terminal 1 causes Q to be switched on with the result that +E is applied to the anode side of the bridge via R When these actions are accomplished the bridge is rendered conductive, causing the switching circuit U e, to be grounded and therefore completed.

It should be noted here that Q and Q are transistors of complementary types and are biased by -E and +E such that a voltage positive with respect to E [e.g., a ground or voltage of zero amplitude] can switch on Q while a voltage negative relative to +E which again can be the ground potential, can cause the switching on of Q Alternatively, by proper selection of bias, base resistances and switching voltages, the switching levels for the A and B circuits can be made dilferent to adapt the arrangement to logic operations employing multi-switching levels.

Since the forward switching voltage 1E may be comparatively low and since the resistances R and R do not load the switched circuit and thus may be of low value, there is less power required for switching a given amount of output power.

The circuit of FIGURE 1 is amenable to a latching or memory type characteristic and to this end cross connecting circuits G and G may be employed, the former connecting the collector of Q to input terminal I via a switch 8,, and the latter connecting the collector of Q; to input terminal 1 via a switch S Assuming both switches S S are closed, the circuit of FIGURE 1 will latch on if a ground or other suitable potential is applied to either of the input terminals I or I In the absence of such a potential the circuit is maintained 013 because the collector of Q is negative relative to the potential E while the collector of Q is more positive than the potential +E Once the circuit has been switched on [and assuming of course that switches S and S are closed], the circuit will stay in a conductive state even after the switching voltage is removed from terminal I or 1 This results from the relatively negative potential which is coupled from the collector of Q, to the base of Q and because of the relatively positive potential which is coupled from the collector of Q to the base of Q In certain applications it is desirable to have the capability of effecting switching at diflerent control levels. This is accomplished in FIGURE 1 by simply opening switch S or S When this is done the latching characteristic is eliminated but a choice of switching levels is made available. For example, and assuming that switch S,, is open, a relatively negative potential applied at input terminal 1 causes Q to be switched on. When this occurs a forward biasing potential is coupled from the collector of Q to the base of Q so that the entire bridge is switched on. If on the other hand S,, is closed and S is opened, a relatively positive potential at terminal I will switch the bridge into conduction.

The circuit of FIGURE 1 is also particularly adapted to supply a monitoring signal or an auxiliary signal and this is advantageously attained from any one of several points including the junction A of FIGURE 1 to which is connected an auxiliary output terminal M useful for monitoring or other purposes.

Because of its performance characteristics and in view of the fact that it acts to complete a circuit to ground, the embodiment of FIGURE 1 is also adapted to provide multi-pole operation. This is readily accomplished by connecting additional branches in parallel with the main bridge. Thus, as illustrated an additional branch comprising serial diodes D and D may be connected in parallel with the bridge with the junction of D and D being connected to the switched circuit U and its series source 2. Similarly, an additional circuit U and its source e may be switched by connecting the same to the junction in an additional branch comprising serially connected diodes D and D The diodes D and D in the base circuits of Q and Q respectively, serve the function of preventing damage to the associated collector-base junction. In addition these diodes may be employed in combination with parallel input diodes to provide logic operations, for example, OR functions. Thus as illustrated in FIGURE 1, the input 1 may be paralleled by inputs I and 1 connected to R via respective diodes D and D The driver sections of FIGURE 1 may thus be utilized to provide logic operations, a technique which is frequently not feasible in electro-mechanical relay circuits.

Because of its accuracy, the switching arrangement of FIGURE 1 is particularly adapted for use in certain computing operations where high order accuracy is required.

However, the switching device according to the invention functions to complete the ground circuit and for this reason its combination with other computation elements in some cases requires certain unique circuit configurations. Certain of these arrangements are illustrated in FIGURES 3, 4, 5 and 6.

Illustrated in FIGURE 3 is an inductive divider such as used in data processing, e.g., in precision ratiometric measurement of AC voltages. The divider comprises a transformer T having a plurality of spaced winding taps connected to define individual winding sections, W W W W In the illustration, the complete winding is of the decade type and each section has its tap connected to a respective switching circuit S S S S These switching circuits are as illustrated in FIGURE 1 [with the additional switching circuits D D and D D not utilized]. The output terminal of each of the switching circuits S S S is connected to ground such that the application of a suitable voltage to the respective control terminal I 1 I I connects the tap associated therewith to ground. This tap grounding action is different from the usual tap selection arrangements found in inductive dividers and to make this action effective, the upper terminal of the divider is connected to the succeeding circuit 0C which may cornprise an output or additional interpolating windings on the same or a different core. The input voltage is applied to terminals I and I connected across the entire divider.

It may be seen that the closure of any of the switches S S S by application of an on signal at the respective terminal I I I results in a grounding of the corresponding tap with the result that all sections below that point are elfectively removed from the circuit while all sections above the tap are operative and connected with the output circuit 00. The switches will each have an appropriate one of the cross couplings G or G, conductive so that the appropriate polarity voltage will cause switch on while the opposite causes switch ofi. However, with certain logic circuits it may be preferable to employ the switches with their latching characteristic.

For accomplishing inversion functions with the switch of FIGURE 1 circuits may be employed such as illustrated in FIGURE 4. As seen therein a transformer T has the two outside terminals of its primary connected to ground via respective switches S and S of the type such as shown in FIGURE 1 with one switch, e.g., S having the cross circuit G complete while S has the opposite coupling G completed. The center tap of the primary winding, W is connected to the signal source, 2, the other terminal which is grounded. The transformer secondary comprises a winding W having output terminals I and I A signal voltage e of selected polarity is applied to the control terminals 1 I of the switches.

It may be seen that the transformer will execute a phase reversal when the states of switches S and S are reversed. Thus, with S on and S ofi, e.g., as will occur when signal voltage e is positive, the output voltage at terminal I is out of phase with the voltage e. When S is switched on and S switched ofi, the voltage e and the output voltage at I are in phase.

The switching circuits according to the invention are adapted to perform certain binary-digital conversion techniques, one of which is illustrated in FIGURE 5. The circuit therein converts a digital input applied at terminals B B B and B into a corresponding analogue voltage, 2 which appears at output terminal I In implementing the foregoing, a voltage e is applied via a terminal I to the primary wind-ing of a transformer T The transformer secondary is tapped and supplies properly weighted proportions of the voltage e to each of the four summing branches of the converter. A first branch comprises the serial combination of resistance R and switch S this branch is connected to the top of the transformer secondary. Receiving a reduced potential is the similar series branch comprising resistor R and switching circuit S Successively lower potentials are applied to the third and fourth branches comprising R34/S34 and Rag/S33.

Although proper weighting of the inputs may be accomplished by an appropriate proportioning of the resistors R R R and R there is an advantage in weighting the voltages prior to application to the respective branches. In this arrangement the resistors R R R and R may be all of the same size so that with their respective stray capacitances, the phase shift in each branch is substantially equal.

The output sides of the branches are all connected together at a summing junction SI of an amplifier A Across the amplifier is feedback resistor R while the amplifier output is connected to output terminal I The switches S S S and S are controlled according to the digital inputs supplied at respective control terminals B B B and B By switching the switching circuits on individually and in suitable combinations, various net digital states of the amplifier can be established and proportional analogue voltages thereby developed at the output terminal. For example a switching signal on terminals B and B representing the quantity 5 for example, will cause the respective switches S and S to be switched on. As a consequence the branches containing R and R are connected to the summing junction SJ with the effect that the amplifier has an output, e proportional to the illustrated digital input of 5. When B and B are energized, the corresponding branches R and R are rendered effective so that the amplifier in effect provides asum proportional to the digital input i.e., provides a corresponding analogue voltage which appears at the output. It may be noted that the low switching impedance of the switching circuits S S S and S is especially advantageous in the circuit of FIGURE 5 where the switch outputs are connected to the virtual ground of the summing junction with their 6 negligible impedances inserted in each of the summing branches in series with the input resistors.

In FIGURE 6 there is illustrated a resolver bridge system employing the switching arrangements according to the invention including the phase inversion technique as illustrated in FIGURE 4 and the inductive divider switching technique shown in FIGURE 3. In general organization the bridge system of FIGURE 6 is similar to that disclosed in copending application, Ser. No. 353,558, filed Mar. 20, 1964 for Data Processing, of which the applicant is co-inventor and which is assigned to the assignee of the instant application.

The input of FIGURE 6 comprises the resolver voltages e and e the former representing the sine component and the latter the cosine component. These voltages may initially be in the form of synchro data which are converted to resolver form by way of the converter DC Examples of such converters are illustrated and described in the above-mentioned copending application. Alternatively, the data may be of resolver type in origin.

Voltage e is applied to the primary winding of a transformer T while voltage e is similarly applied to the primary of a transformer T The voltages are each applied to the center tap of the respective primary and the outside terminals of both windings are provided with solid state switches such as those described and illustrated in FIGURE 1. It may be seen that the primary of each transformer is instrumented to effect phase reversal in accordance with the switching of the switch pairs S /S in the case of T and Sqo/Sq in the case of transformer T These switches are actuated in accordance with the adjustment of the bridge, following the reversal techniques described in the aforesaid copending application.

The secondary of transformer T consists of two separate inductive dividers each tapped to yield values of sine/cosine increments, D, of 10 degrees. It should of course be understood that other increments may be used. Each tap is connected to a respective switch of the type illustrated in FIGURE 1 with the switch functioning to ground the respective tap when the switch is rendered conductive by the appropriate control signal. This arrangement is symbolized by the block labeled SC one of the switches being schematically indicated in the closed state whereupon its associated tap connection is grounded. A similar arrangement characterizes the switching circuits connected to the winding W of T this being Shown schematically by the block labeled SC The switching of the circuits in SC and SC are coordinated such that the adjustment of the bridge to an angle causes that tap to be selected in SO which yields the sine of m at the output terminal of W and causes that tap to be selected in SC which yields at the output terminal of W the sine of (a -t-D). Of course it should be borne in mind that the outputs from both windings include a voltage related to cosine 0.

A similar arrangement characterizes the two secondary windings W and W of transformer T The switching in S0 is such that the output includes the factor cosine a while the switching in SO yields the cosine of (ct-i-D). The value of D in degrees is the same as the size of each divider increment.

The resultant four outputs are applied to combining means embodied as a transformer T and a transformer T The primary winding W of transformer T is energized by the combination of signals appearing at the outputs of windings W and W The primary winding W of transformer T is energized by the combination of signals developed at windings W and W This computing operation is similar to that described in the aforesaid copending application.

The output signals developed across the secondaries of transformers T and T are combined in the manner shown with one terminal of W and the center tap of W being connected across an inductive divider D The other end terminal of W and one end terminal of W are connected together while the other end terminal of W is connected via a resistance R to the common switched terminals of a plurality of solid state switches, SO each of which is connected to a respective tap on D The junction of resistance R and this common terminal is connected to a null detector which is responsive to the condition of balance or unbalance in the bridge. Divider D and the associated switches SC function as an interpolating arrangement for interpolating the relatively coarse adjustment of the bridge at the input dividers T and T The adjustment of switches in SC is coordinated with the adjustment of the switching networks SC, SCGZ, S071 and SCqg.

The voltage e, across W is combined with e across W In the illustrated case e is subtracted from e and the resultant voltage e applied to the divider to produce a fraction of e i.e., a net signal ke The output circuit of FIGURE 6 is in essence a form of summing circuit such as shown in FIGURE in which currents are summed. The current flowing through R is a function of e while the current flowing out of the switch network is a function of ke The summing junction is effectively at a ground potential because of the feedback effect involving the whole bridge.

The bridge may be of the automatic type as described in the aforesaid copending application, i.e., with the bridge adjustment controlled by way of feedback from the null detector or with the bridge adjustment effected independently thereof with the null detector employed to provide read-out or storage of that adjustment angle which yields a null. Alternatively the bridge may be completely manual with the null detector isolated from the bridge adjust and read-out circuits.

The invention is not limited to the specific mechanisms shown and described since modifications will undoubtedly occur to those skilled in the art. Changes may be made within the scope of the accompanying claims without departing from the spirit and chief advantages of the invention.

-What is claimed is:

1. A solid state switching circuit comprising a bridge arrangement having diodes in at least some of the bridge arms,

the serial combination of signal source and output circuit constituting the signal load connected between two diagonal signal junctions of the bridge,

and a control circuit interconnecting diagonally opposite control junctions of the bridge for turning the bridge on and ofi,

a forward biasing potential source in said control circuit having a terminal connected to one of said signal junctions; said one signal junction constituting a common potential point, and control switch means in said control circuit connected to cause conductive current to flow through the bridge from said potential source independently of the signal from said signal source when said control switch means are in one state.

2. A solid state switching circuit according to claim 1 wherein said control switch means includes two control switches and wherein said forward biasing potential source includes a common terminal connected to said common signal junction and positive and negative terminals connected respectively to said control switches.

3. A solid state switching circuit according to claim 1 wherein said control switch means comprises a pair of opposite conductivity type transistors connected in serial relation to said forward biasing potential source and 8 biased to be turned on for turning on said switching circuit.

4. A solid state switching circuit according to claim 3 including a cross-coupling between said transistors for rendering said transistors jointly responsive to turn-on of one of said transistors.

5. A solid state switching circuit comprising a signal branch including end terminals and the serial combination of a signal source to be switched and an output circuit constituting the signal load connected between said end terminals,

first and second switching branches each including diode means,

said switching branches being connected in parallel with each other and with said signal branch,

a forwardly biasing control circuit including a forwardly biasing source, said forwardly biasing control circuit being connected to one of said end terminals constituting a reference potential point,

conduction control means having at least two states and connected to said switching circuit to render said forward biasing potential means ineffective in one state and means for switching said conduction control means to said other state for rendering said switching branches conductive to thereby complete the return circuit between said signal source and load for transferring substantially all of said signal to said load.

6. A switching arrangement as defined in claim 5 wherein each switching branch comprises the serial combination of said diode means, a part of said forwardly biasing source and a switch, said switch being a component of said control switch means.

7. A switching arrangement as defined in claim 6 wherein each switching branch also includes a diode connected in parallel with said part of said forwardly biasing source and respective switch.

8. A switching arrangement as defined in claim 5 in which said reference end terminal is grounded.

9. A switching arrangement comprising a diode bridge having a pair of parallel branches interconnected at their ends to form two control terminals and provided with controlled terminals connected respectively to intermediate junctions of said branches, a switched circuit comprising two end terminals and a controlled circuit and series source therebetween, one of said bridge controlled terminals being connected directly to a return circuit and to one end terminal of said switched circuit and the other of said bridge controlled terminals being connected to the other end terminal of said switched circuit, sources of cutoff and conductive potential, said conductive potential source being connected to said return circuit, a pair of resistances, a pair of complementary transistors, said bridge control terminals each being connected through one of said resistances to said source of cut-off potential and through the emitter-collector circuit of one of said transistors to said source of conductive potential, said conductive potential being low relative to said cut-off potential, and an input terminal connected to the base circuit of one of said transistors.

References Cited UNITED STATES PATENTS 9/1958 Walker 30788.S X 12/1964 Bogdan et al. 307--88.5

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No. 3,366,804 January 30, 1968 John B. Heaviside It is hereby certified that error appears in the above numbered patent requiring correction and that the said Letters Patent should read as corrected below.

In the heading to the printed specification, line 5, for

"New Jersey" read New York column 1, line 67, for "technique" read techniques column 3, line 18, for "conected" read connected column 4, line 53, for "D second occurrence, read B Signed and sealed this 22nd day of April 1969.

(SEAL) Attest:

EDWARD J. BRENNER Commissioner of Patents Edward M. Fletcher, Jr.

Attesting Officer 

